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Receivers with chip-level decision feedback equalizer for CDMA downlink channels

机译:具有用于CDma下行链路信道的芯片级判决反馈均衡器的接收器

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摘要

For the code division multiple access (CDMA) downlink channel, we investigate the decision feedback equalizer (DFE) at chip-level to effectively suppress multiple-access interference (MAI) when the spreading sequences are orthogonal. The structure of the receiver with the chip-level DFE has been investigated and the minimum mean-square error solution has been derived. Due to the inherent structure of the chip-level DFE, some iterative techniques with hard and soft decisions have been proposed. It is shown that the proposed receivers with the chip-level DFE can provide satisfactory performance. In comparison with the adaptive chip-level linear equalizer, the number of users can be doubled by using adaptive chip-level DFE at a bit-error rate of 10/sup -3/. Throughout the paper, we assume that scrambled orthogonal codes are used for spreading sequences.
机译:对于码分多址(CDMA)下行链路信道,我们在芯片级研究决策反馈均衡器(DFE),以有效抑制扩频序列正交时的多址干扰(MAI)。研究了具有芯片级DFE的接收器的结构,并推导了最小均方误差解决方案。由于芯片级DFE的固有结构,已经提出了一些具有硬决策和软决策的迭代技术。结果表明,所提出的具有芯片级DFE的接收机可以提供令人满意的性能。与自适应芯片级线性均衡器相比,通过使用自适应芯片级DFE(误码率为10 / sup -3 /),用户数量可以增加一倍。在整个论文中,我们假定加扰的正交码用于扩频序列。

著录项

  • 作者

    Choi, J.; Kim, S.; Lim, C.C.;

  • 作者单位
  • 年度 2004
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  • 原文格式 PDF
  • 正文语种 en
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